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[Other resource] cntl_ddr3(xilinx)

Description: xilinx ddr3最新VHDL代码,通过调试
Platform: | Size: 101306 | Author: zhang chi | Hits:

[VHDL-FPGA-Verilog] cntl_ddr3(xilinx)

Description: xilinx ddr3最新VHDL代码,通过调试-xilinx ddr3 latest VHDL code through debugging
Platform: | Size: 101376 | Author: zhang chi | Hits:

[Finance-Stock software system] MT41J64M16LA-187E

Description: Micron DDR3 内存 MT41J64M16LA-187E schlib.-Micron DDR3 MT41J64M16LA-187E symbol lib .
Platform: | Size: 2048 | Author: gao | Hits:

[VHDL-FPGA-Verilog] DDR3

Description: DDR3控制器，基于Altera平台，修改管教后直接可以下载进PFGA-DDR3 controller, based on Altera platform, modify the discipline can be downloaded directly into the PFGA
Platform: | Size: 559104 | Author: andy | Hits:

[VHDL-FPGA-Verilog] source

Description: altera DDR3 逻辑测试代码，这是工程实际调试好的代码，保证能用。-altera DDR3 vhdl code
Platform: | Size: 420864 | Author: ww | Hits:

[VHDL-FPGA-Verilog] ddr3

Description: VHDL code sample.this files is the VHDL code for using of DDR3 and DDR2 SDRAM.
Platform: | Size: 7168 | Author: homan | Hits:

[VHDL-FPGA-Verilog] xilinx_DDR3-ctl_code

Description: VHDL语言，xilinx,ddr3 控制代码，已实现-VHDL xilinx DDR3ctl code
Platform: | Size: 101376 | Author: 朱陈喜 | Hits:

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